Faced with testing a new VHDL design the producer looked at some applications for helping in this task.

But when I started to write down the tests I wanted to do to test out the serial inputs and outputs of my design, I found none of these programs had the ability to define anything other than very simple patterns, and the VHDL they produced was so difficult to modify I really couldn't see that they would be a help.

Limitations:

· 30 dayS trial