DASMx was developed to be a disassembler for a range of common 8-bit microprocessors. The following main processor families are supported:
- Motorola 6800 family and single chip variants (including Hitachi 630X devices);
- Motorola 6809;
- MOS Technology 6502 and Rockwell 65C0X;
- Zilog Z80;
- Sharp LR35902 (single chip Z80 variant as used in the Nintendo GameBoy);
- Intel MCS-80/85TM family (i.e. 8080 and 8085);
- Intel MCS-48TM family (i.e. 8048 et al);
- Intel MCS-51TM family (i.e. 8051 et al);
- Signetics 2650.
The disassembler takes as input a binary code/data image file (typically a ROM image) and generates either an assembler source file or a listing file. DASMx is a multi-pass disassembler with automatic symbol generation. DASMx can optionally use a symbol file containing user-defined symbols and specifications of data areas within the source image.
DASMx includes a powerful feature called code threading. Using known code entry points (e.g. reset and interrupt vectors) and by performing partial emulation of the processor, the disassembler is able to follow known code paths within a source binary image.
Use of code threading, together with the multi-pass operation and symbol table management permits readable assembly code output from source images that contain large amounts of data (which tend to confuse most disassemblers).
Here are some key features of "DASMx":
Disassembly of object code images for the following microprocessors:
· Motorola 6800, 6802 and 6808;
· Motorola 6801 and 6803;
· Hitachi 6301 and 6303;
· Motorola 6809 and Hitachi 6309;
· MOS Technology/Rockwell 6502;
· Rockwell 65C00/21 and 65C59;
· Rockwell 65C02, 65C102 and 65C112;
· Zilog Z80;
· Intel 8080 and 8085;
· Sharp LR35902 (i.e. GameBoy processor);
· Intel 8048;
· Intel 8051;
· Signetics 2650.
· Multi-pass operation, with automatic symbol generation for jump, call and data target addresses;
· Code threading (used to automatically differentiate code from data);
· Control file containing user defined symbols, specifications of data areas and code entry points;
· Generation of full listing or assembler output file;
What's New in This Release: [ read full changelog ]
· Disassembly of Hitachi 6301 and 6303 added;
· Disassembly of Rockwell 65C00/21, 65C29, 65C02, 65C102 and 65C112 added;
· Disassembly of Intel 8051 added;
· Disassembly of Sharp LR35902 (GameBoy processor) added;
· Corrected documentation concerning Hitachi 6309 (which has, in fact, an identical instruction set to the 6809);
· Labelling and threading improvements for 8080, 8085 and Z80 disassembly (affects RST and indirect addressing instructions);
· Correction to instruction format for 2650 lodz/eorz/andz/…;
· New wide listing format showing execution cycles for each instruction;
· File size, checksum and CCITT CRC-32 calculated and shown in listing header;
· Auto number format determined by processor type (which can be overriden by a directive in the symbol file);
· User messages can now be specified and generated from the symbol file;
· Symbol file includes (which may be nested) now permitted.
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