Capstone Changelog
What's new in Capstone 4.0
Dec 19, 2018- [ Core ]:
- New APIs: cs_regs_access()
- Add new options for cs_option(): CS_OPT_MNEMONIC & CS_OPT_UNSIGNED & CS_OPT_SYNTAX_MASM.
- Various updates & bugfixes for all architectures.
- Add 4 new architectures: EVM, M68K, M680X & TMS320C64x.
- Add new group types: CS_GRP_PRIVILEGE & CS_GRP_BRANCH_RELATIVE.
- Add new error types: CS_ERR_X86_MASM.
- [ X86 ]:
- Add XOP code condition type in x86_xop_cc.
- Add some info on encoding to cs_x86 in cs_x86_encoding.
- Add register flags update in cs_x86.{eflags, fpu_flags}
- Change cs_x86.disp type from int32_t to int64_t.
- Add new groups: X86_GRP_VM & X86_GRP_FPU.
- Lots of new instructions (AVX)
- [ ARM64 ]:
- Add instruction ARM64_INS_NEGS & ARM64_INS_NGCS.
- [ Mips ]:
- Add mode CS_MODE_MIPS2.
- [ PPC ]:
- Change cs_ppc_op.imm type from int32_t to int64_t.
- Add new groups: PPC_GRP_ICBT, PPC_GRP_P8ALTIVEC, PPC_GRP_P8VECTOR & PPC_GRP_QPX.
- Lots of new instructions (QPX among them)
- [ Sparc ]:
- Change cs_sparc_op.imm type from int32_t to int64_t.
- [ Binding ]:
- New bindings: PowerShell & VB6
New in Capstone 3.0.5 RC2 (Jul 31, 2017)
- Release 3.0.5-RC2 is a release candidate version, with important fixes in the core & several bindings.
- Library:
- Fix build for Visual Studio 2012
- Fix X86_REL_ADDR macro
- Add CS_VERSION_MAJOR, CS_VERSION_MINOR, CS_VERSION_EXTRA
- Better support for embedding Capstone into Windows kernel drivers
- Support to embedded Capstone into MacOS kernel
- Support MacOS 10.11 and up
- Better support for Cygwin
- Support build packages for FreeBSD & DragonflyBSD
- Add a command-line tool "cstool"
- Properly handle switching to Endian mode at run-time for Arm, Arm64, Mips & Sparc
- X86:
- Some random 16-bit code can be handled wrongly.
- Remove abundant operand type X86_OP_FP
- Fix instructions MOVQ, LOOP, LOOPE, LOOPNE, CALL/JMP rel16, REPNE LODSD, MOV *AX, MOFFS, FAR JMP/CALL
- Add X86_REG_EFLAGS for STC and STD
- Fix instruction attributes for SYSEXIT, MOVW, ROL, LGS, SLDT
- Rename registers ST0-ST7 to be consistent with asm output
- Arm:
- Properly handle IT instruction
- Fix LDRSB
- Fix writeback for LDR
- Fix Thumb BigEndian setup
- Fix arith extender
- Fix writeback for LDR
- Rename enum arm64_mrs_reg to arm64_sysreg
- PowerPC:
- Print 0 offset for memory operand
- Sparc:
- Fix POPC instruction
- Python binding:
- Better PyPy support
- Add __version__
- Better support for Python 3
- Fix CS_SKIPDATA_CALLBACK prototype
- Cast skipdata function inside binding to simplify the API
- Java binding:
- Better handle input with invalid code
- PowerShell binding:
- New binding
New in Capstone 3.0.4 (Jul 31, 2017)
- Release 3.0.4 is a stable version with important fixes in the core & Python bindings.
- Library:
- Improve cross-compile for Android using Android NDK.
- Support cross-compile for AArch64 Android (with Linux GCC).
- Removed osxkernel_inttypes.h that is incompatible with BSD license.
- Make it possible to compile with CC having a space inside (like "ccache gcc").
- X86:
- Fix a null pointer dereference bug on handling code with special prefixes.
- Properly handle AL/AX/EAX operand for OUT instruction in AT&T syntax.
- Print immediate operand in positive form in some algorithm instructions.
- Properly decode some SSE instructions.
- Arm:
- Fixed a memory corruption bug on IT instruction.
- Mips:
- Fixed instruction ID of SUBU instruction.
- Fixed a memory corruption bug.
- PowerPC:
- Fixed some memory corruption bugs.
- XCore:
- Fixed a memory corruption bug when instruction has a memory operand.
- Python binding:
- Support Virtualenv.
- setup.py supports option --user if not in a virtualenv to allow for local usage.
- Properly handle the destruction of Cs object in the case the shared library was already unloaded.