DSPLLsim Changelog

What's new in DSPLLsim 4.7.0.0

Sep 5, 2012
  • For Si5369 devices added the FASTLOCK setting to the Register Map.
  • Removed registers 12, 13, 14 and 15 from the Register Map for Si5369 devices since they are undefined
  • Added a "force inexact mode" option to Free Run mode. This allows the user to obtain Free Run Mode solutions that exclude CKIN1
  • Added a user input for Fin when "Read from device" is selected and using a Si5327 device.
  • Increased the range of the minimum f3 control when CLKIN is < 16KHz. Added labels to the minimum f3 control to describe the valid range of values.
  • Fixed a bug that resulted in a "divide by 0" error message when reading a frequency from a device that is programmed with certain frequency plans.
  • Fix a bug that resulted in the most significant bit and the least significant bit LOSx_EN being swapped
  • Fixed a USB interface bug that resulted in intermittent USB errors when running on Windows 7 64-bit systems.
  • Added version checking to notify the user when a new DSPLLsim version is available for download from the Silicon Laboratories website.