What's new in Eclipse Verilog editor 1.5.0
Sep 14, 2018
- Package and subprogram generics.
- Generic types, subprograms and packages.
- Added support for force/release keywords
- Added support for hierarchical signal access
- Added support for context definition and refernce
New in Eclipse Verilog editor 1.2.1 Beta (Jun 11, 2015)
- Added some Verilog syntax checks.
- Ignoring encrypted Verilog code, based on the protected pragma.
- Using the used VHDL packages in a file, when jumping to a declaration of this value in a package.
- Upon VHDL detection of multiple implementations of the item you want to jump to.
- VHDL various syntax checks.
New in Eclipse Verilog editor 1.2.0 Beta (Jun 11, 2015)
- Added support for subtype definition jumping.
- Improved code info hit popup
- Autocomplete of "use" with common ieee libraries
- New templates for record, array and subtype
- Improved New File Template selection (for Verilog and VHDL)
- Improved formatting in VHDL (alignment on => := and directional directives)
New in Eclipse Verilog editor 1.2 Beta (Jun 11, 2015)
- Better association of build errors with source files
- Better handling of direct VHDL instantiations in the outline
- Ability to use variables in the compile/simulate/build commands
New in Eclipse Verilog editor 1.1.1 Beta (Jun 11, 2015)
- Fixed format bug(ID 3553659)
- Debug evaluation of parameter expression.
- Stricter bit width checking of assignment and operation.
- Checking input or output port connection.
New in Eclipse Verilog editor 1.1.0 Beta (Jun 11, 2015)
- New Features:
- Verilog syntax check more strictly.
- Add waring preference page.
- Add waring annotation about the followings:
- "never used", "never assigned", "cannot be resolved", "assignment bit width mismatch" and "blocking and non-blocking assignment"
- Calculate parameter and localparam value in annotation hover.
New in Eclipse Verilog editor 1.0.0 Beta (Jun 11, 2015)
- Bug fixes:
- Multi-line tabbing problem (ID 2726346)
- VHDL parser hangs (BUG ID 2952670)
- when using autocompletion, files often get mixed line endings
- mismatch between the classes RecordElement and TypeDecl, making autocompletion of record members to malfunction
- Fixed VHDL parser errors (3034727, and 1835772)
- New Features:
- Extended autocompletion to also include types, constants and function declarations in packages
- Extended the VHDL syntax to the 2002 standard using http://www.iis.ee.ethz.ch/~zimmi/download/vhdl02_syntax.html
- Now when the external builder has errors, and you save the file these errors disappear because saving a file causes the file to be parsed internally (without errors) and removes all markers.
- Adding a new marker type for problems/warnings of the external builder solves this issue.
- Default error parsers not stored in workspace anymore
- The VHDL parser now has time out options for large files.
- It is possible to skip parsing of VHDL parsing by including special comments (see the features page)
- Several internal improvements and code re-org
- VHDL auto test-bench creation now has its own customizable template (see the features page)
New in Eclipse Verilog editor 0.7.1 Beta (Jun 11, 2015)
- When opening a very large VHDL file, the program may freeze or run out of memory.
- Type definitions did not show properly in the file outline.
New in Eclipse Verilog editor 0.7.0 Beta (Jun 11, 2015)
- Goto Definition now also searches in packages of other files, not only in current file.
- Solved few bugs, added alignment on :,=> and
New in Eclipse Verilog editor 0.6.2 Beta (Jun 11, 2015)
- The editor of Eclipse can be set to use spaces as tabs, the insertion of code templates and automatic component instantiations should be according to this setting
- Some altera generated files are encrypted. = binary file, but with .vhd extension. The internal VHDL parser gives on error on this.
- Altera SOPC generates a file with a more then 10000 characters on one line! The internal VHDL parser hangs
- The comment/uncomment introduces a useless space after the -- and does not work well if comment was not originally insterted by the comment action
- If you compile a file with the "compile command", the errors are parsed and added to the Problems Page. When you compile it again without saving, the same errors are added twice to this list
- Format problems with:comment lines,statements written over multiple lines, alias is : the is causes a shift to the right,signal