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Kactus2 Changelog

What's new in Kactus2 3.9.0

Jul 2, 2021
  • Added PythonAPI to provide access to Kactus2 through python code:
  • PythonAPI is separated from Qt
  • PythonAPI folder contains example scripts
  • PythonAPI can also use some generators (VHDL, Verilog, Linux device tree and Makefile)
  • Added KactusAPI class to provide library and utilities to PythonAPI
  • Added a console in GUI for interpreting python scripts:
  • Allows multiline code to be executed in Python on Windows console mode
  • Added script history, run file and save function
  • Separated Kactus2 editor models into interfaces:
  • Ports
  • Parameters
  • Fields
  • Field resets
  • Registers
  • Address block
  • Memory maps
  • Files
  • File sets
  • Component instantiations
  • Port maps
  • Port abstractions
  • Bus interfaces
  • Added CMSIS System View Description (SVD) generator plugin:
  • SVD files can be created from a HW design
  • Added extend port abstractions to abstraction definition editor
  • Added depenency analysis for (system) Verilog module instantiations
  • Fixed parameter string value parsing in Verilog import
  • Fixed right port boundary in ConnectionEditor
  • Fixed port map tables with non-existing ports
  • Fixed document writing pointer sharing
  • Fixed memory visualization
  • Changed fields and field gaps for faster updates
  • Fixed label resizing, positioning and clipping
  • Fixed visualization on expanding items
  • Fixed updating register files
  • Updated visualization to correctly display over 32-bit long address ranges
  • Fixed crashing when re-importing a file to a Component

New in Kactus2 3.7.0 (Mar 29, 2019)

  • Added auto connector tool for component instances in a design
  • Added editor for Vendor Extensions in Component and Design
  • Added support for register files
  • Added support for multiple reset values for register fields
  • Added scrolling to design view when items are dragged
  • Improved memory map visualization and library loading performance
  • Improved expression parsing
  • Added support for bitwise operations
  • Improved expression solving performance
  • Improved VHDL and Verilog support
  • Fixed array and vector boundary handling
  • Include Verilog file parameters are imported
  • Imported parameter type is set based on the data type in VHDL
  • Improved HW design editor to accept connections between extended bus definitions
  • Fixed an issue where removing an item in library did not remove the file on disk
  • Fixed an issue where removing items in memory maps would cause the application to crash
  • Fixed an issue where setting an empty bus interface mode would cause the application to crash
  • Fixed an issue where design active views were cleared on save
  • Fixed an issue where plugin details were incorrectly displayed in the settings
  • Fixed an issue where component instance parameter override was incorrectly displayed when using parameter choices
  • Fixed an issue where multiline description was not correctly CSV imported/exported

New in Kactus2 3.6.50 (Jun 29, 2018)

  • Added editor for AbstractionDefinition transactional ports
  • Added option to extend BusDefinitions
  • Added editor for field reserved-value
  • Added SystemVerilog files to be included in generated Quartus projects
  • Fixed an issue where modifying/removing files outside Kactus2 caused the application to crash
  • Fixed an issue where editing AbstractionDefinition port properties affected all modes

New in Kactus2 3.6.0 (Jun 29, 2018)

  • Added support to run Kactus2 from command-line without GUI
  • Added editor for port type definitions
  • Added support for multiple abstraction definitions in a bus interface
  • Added Linux Device Tree Generator plugin
  • IP-XACT library handling improved for better performance and readability
  • HW and System design area size now adjusts to contents
  • Restored automatic item selection in library view when component instance is selected
  • Fixed addressSpaceRef-attribute parsing and writing
  • Fixed export dialog from hierarchy view
  • Fixed missing type information in VHDL generation
  • Fixed error in entity parsing in VHDL import
  • Fixed a crash when creating a new HW Design
  • Fixed a crash in saving user settings for code editor
  • Fixed an issue where Component file set directories were lost on refresh
  • Changed binary name to kactus2 (previously Kactus2) in Linux
  • Enabled C++11 by default in Linux compilation
  • Improved Linux installation in user-specified directory
  • Migrated to Qt 5.10.1
  • Migrated to VS2017
  • Improvements to Memory Designer:
  • Improved item scaling in non-compressed mode:
  • Improved search through hierarchies
  • Improved visulization for multiple address spaces connected to one memory map
  • Added feature to save HW, System and Memory Designer view as a PNG, JPG or SVG image
  • Improved expression parsing:
  • Support for exp, pow and sqrt functions
  • Better suppport for string expressions and their comparison
  • Faster parsing algorithm

New in Kactus2 3.5.0 (Nov 27, 2017)

  • Graphical user interface visual update:
  • All icons updated
  • Instruction labels added in dialogs
  • Colors centralized in KactusColors.h
  • Added feature to show the directory icons provided by OS for library paths which shows version controlled items in Windows
  • Added feature to automatically update library view when file changes on disk Added feature to select the which HW design to open for an IP-XACT component with multiple designs
  • Added editor for indirect interfaces in component
  • Added editor for component instantiation parameters
  • Added editor for design configuration instantiation parameters
  • Added editor for design configuration instantiation configurable elements
  • Added editor for design instantiation configurable elements
  • Added feature to define prefix in port map auto-connect for better matching Added editor for design parameters
  • Improved performance on drawing connections in design
  • Added delete in context menu in design view
  • Improvements in Memory Designer:
  • Added support for multiple items accessing the same memory map
  • Improved layout for items
  • Improvements in HTML generation:
  • Added writing register and field reset values in HTML
  • Added writing instantiations within a component in HTML
  • Fixed error in XML schema location writing
  • Fixed C source editor refresh
  • Fixed port size parsign in PADS part generator which previously caused the plugin to crash
  • TLMW generator plugin removed from build
  • Software component instance merged to component instance
  • Changed VHDL import to create component parameters and retains references in port boundaries
  • Moved VHDL generator from core to a separate plugin
  • ModelSim generator plugin moved to same framework as Verilog generator

New in Kactus2 3.4.0 (Aug 8, 2017)

  • Enhanced features for Memory Designer:
  • Added feature to visualize overlapping memory items
  • Added feature to open the containing component and the editor for the selected item
  • Added feature to visualize local memory maps
  • Changed the visual look of a connection through a bridge
  • Changed display name to be shown instead of element name, if defined
  • Improvements to Verilog generation:
  • Added preview for generated files
  • Added message console for reporting generation status
  • Improved port assignment and vector boundary generation logic
  • Fixed error in importing Verilog ports
  • Added editor for Catalogs
  • Component editor layout updated for most editors
  • Enabled expressions in parameter value when using a choice
  • Added isPresent-property to memory maps, address blocks, address spaces and segments
  • Improved completion help for fileset filetypes and groups
  • Enabled CSV import/export of files in a fileset
  • Added feature to hide immediate values from configurable element values
  • Enabled keyboard navigation in VLNV tree view
  • Added expand/collapse options in VLNV tree view context menu
  • Help and tooltips updated
  • Custom XML namespaces are retained in XML files
  • Removed address space reference and base address from mirrored-master bus interface
  • Fixed crashing when adding port maps in component
  • Fixed a referencing issue with configurable element values when changing active view
  • Fixed crashing when a design did not have a configuration
  • Fixed crashing when closing a design in specific cases
  • Fixed modifications to design connections while the document was unlocked
  • Fixed CSV import/export of signal definitions in abstraction definition
  • Fixed missing component editor visibility options
  • System mode bus interface coloring changed from red to purple to avoid confusion with invalid interfaces
  • Changed "frozen column" in editors to use vertical headers instead of a separate table
  • Toolbar "Check intergrity" changed to show listing of all errors within the library
  • in separate window.
  • Exit screen is displayed longer

New in Kactus2 3.3.0 (Mar 14, 2017)

  • Enhanced features for Memory Designer:
  • Register fields added
  • Compression of items to minimize the required space
  • Multiple address spaces can now be shown as part of the same connection
  • Filtering options added
  • Memory connectivity analysis now manages also instances with identical names
  • File paths within filesets now accept URI expressions
  • Files can be drag-dropped to filesets from the file system
  • Memory map visualization items have now bigger area for expand/collapse
  • Port direction is now checked when a default value is set
  • Port map invert and tieoff are now also shown on the top level of tree hierarchy
  • Zooming now follows mouse location in design
  • Enhanced usage of drafts in design:
  • Bus interface definitions copying when connecting hierarchical draft interface fixed
  • Bus interface definitions copying when connecting non-hierarchical draft interface removed
  • Bus interface definitions and port copying to draft instances changed to take place on packaging of the containing draft component instance
  • Copy-paste of bus interface to a draft component instance changed to copy only the name and the mode of the interface
  • Notification on trying to read XML files of previous standard versions added
  • Improvements to Verilog generation:
  • Generation setup dialog simplified
  • Register definition creation set as optional
  • Module name is correctly used for component instances
  • Environmental identifier created by the generator changed
  • Improvements to Verilog import:
  • Port type parsing improved for Verilog-2001 style ports
  • Parameter parsing improved for lists of parameters
  • Environmental identifier created by the import changed
  • Improved features for MakefileGenerator:
  • Conflicting file selection added
  • Launcher script creation set to optional
  • Others:
  • Bus interface creation wizard fixed from preventing user to proceed from the general
  • settings page due to missing port maps
  • Component instance replace in design changed to better preserve existing connections
  • Port bounds for ad-hoc connections in design fixed
  • Author information read from XML fixed
  • Symbolic file link usage for XML files fixed
  • Toolbar placement at the bottom of main window fixed
  • Software views are replaced by views and component instantiations
  • Community guidelines included in manual
  • Settings file path is now shown on the General page of Settings
  • Automatic port mapping changed to less aggressively connect ports
  • Component instance architecture changed to be correctly set by VHDL generator
  • KNOWN UNRESOLVED ISSUES:
  • UI issue: paste command does not update usage count of referenced parameters

New in Kactus2 3.2.0 (Sep 23, 2016)

  • Added preliminary version of memory designer:
  • Address spaces and Memory maps within design hierarchy are visualized with their
  • addressing information
  • Connectivity between spaces and maps are visualized
  • Added preliminary version of memory connectivity analysis within designs
  • Added plugin for generating memory listing in CSV format
  • Improvements to Verilog generation
  • Added "Getting started" section to help
  • Fixed performance issues
  • Fixed crashing when opening a bus interface without abstraction definition
  • ModelSim Generator moved from core to a separate plugin

New in Kactus2 3.1.0 (Sep 23, 2016)

  • Added support for tieoff values in design and port maps
  • Added feature to copy memory-elements along with their sub-elements
  • System group names are now visible and editable in Bus editor
  • Generated Verilog parameters are now correctly ordered for references
  • Performance improvements
  • ModelSim Generator moved from core to a separate plugin
  • XML processing instructions are now retained in IP-XACT files
  • Added option for Linux installation without admin privilidges
  • New design for port map editor:
  • Added feature to auto-connect logical and physical ports
  • Logical and physical bounds are now easily editable
  • Improved expression support:
  • Basic comparison operators are now accepted
  • Values true/false are now accepted

New in Kactus2 3.0.0 (Sep 23, 2016)

  • Updated all IP-XACT elements to 2014 standard
  • Improved validation for many IP-XACT elements
  • Updated Verilog generation for one-to-many ad-hoc connections.
  • Updated port editor to accept ports without defined left and right bounds as ports with a width of 1.
  • Updated parameter referencing.
  • Updated expression parser.
  • Updated component editor memory map visualization.
  • In component editor, changed cut command to copy and remove selected cells of a table.
  • Usability fixing.
  • Added new view related editors for component editor:
  • Component instantiations
  • Design instantiations
  • Design configuration instantiations.
  • Updated HW design editor:
  • Updated component instance creation.
  • Updated component instance removing.
  • Updated component instance replacing.
  • Updated connection removing.
  • Invalid ad-hoc interfaces and ports are displayed with a red colour.
  • Enabled deleting of invalid ad-hoc interfaces and ports.

New in Kactus2 2.8.49 (Aug 17, 2015)

  • Improved editing e.g. copy-paste within tables
  • Added 'tags' column for ports for easy grouping
  • Added 'isPresent' for registers
  • Added reset for fields
  • Added support for expression in bus interface base addresses KNOWN UNRESOLVED ISSUES:
  • Memory map header generation from a system design does not work properly.
  • Parameters created with version 2.7.0 may not work with the latest release due to change in id formatting. The fastest way to fix this is to re-create the parameters.
  • SystemVerilog expressions are not supported by some features including generators.
  • If expressions or references have been used, it may cause at least the following issues:
  • VHDL generator will generate wrong values.
  • Port maps will not automatically adjust to changes in port size.
  • VHDL import does not preserve references to model parameters. * In ports editor, creating a bus interface through ports is not possible for name column.

New in Kactus2 2.8.0 (Jun 19, 2015)

  • Added feature to import parameters from include files.
  • Improved configurable element variables editor
  • Synchronizes with the enhanced model parameter definition.
  • The parameters of the top component can be used in the configurable element variables.
  • Variables are now grouped according to their location in the component.
  • Added editors for IP-XACT elements remapState and memoryRemap.
  • Added support for expressions in memory map elements.
  • Added support for parameter references in generated header files.
  • Added feature to save new versions of design configurations and designs.
  • Added support for module parameters to hierarchical views.

New in Kactus2 2.7.970 (May 20, 2015)

  • Added support for SystemVerilog expressions in memory map and address space visualization
  • Added register dimensions in memory map visualization
  • Added remaps for memory maps
  • Added support for SystemVerilog expressions in generated memory map header files excluding generation from a system design
  • Improvements in memory map editor user interface

New in Kactus2 2.7.572 (May 20, 2015)

  • Added import for Verilog defines as component parameters
  • Added dependency analysis for Verilog include directives
  • Added grouping of configurable element values according to location in component
  • Added placeholder for remap states in component editor
  • Changed types in Plugin and Source analyzer plugin interfaces

New in Kactus2 2.7.463 (May 20, 2015)

  • Added support for referencing parameters in top component of a design.
  • Added new editor for parameter values in an array.
  • Improved validation of configurable element values:
  • Minimum, maximum and type restrictions are enforced.
  • Choices can be selected from drop-down list.
  • Arrays can be edited in similar fashion to component editor.
  • Added support for enabling/disabling register fields.
  • Added support for expressions in AddressBlock base address, range and width.
  • Added validity checks and separate display for referenced designs in hierarchical views.
  • Configurable element values are now stored by default in Design Configuration instead of Design.
  • Renamed hierarchy level "Global" to "Flat".
  • Changed Quartus Pin Import plugin to conform with Import plugin interface.

New in Kactus2 2.7.192 (May 20, 2015)

  • Added support for references in Verilog generator.
  • Verilog importer accepts semicolons in comments.
  • Added memory maps and registers to html documentation.
  • Added support for references in import wizard.
  • Replaced evaluated value with IDs in Verilog import.
  • Improved usability of expression editor.
  • Added support for references in document generator.
  • Implemented module parameters in views.
  • Added name as a frozen column to parameters, model parameters and module parameters.
  • Name and port number columns were frozen in port table.
  • Where expressions are used, changed the table to show the expression by default.
  • The tooltip now shows the evaluated value.
  • Register reset value and reset mask can now be inserted as a bit type value.
  • Arrays can be inserted as a value for parameters.

New in Kactus2 2.7.0 (Feb 11, 2015)

  • Added support for SystemVerilog expressions in:
  • component parameter and model parameter value,
  • component port bounds and default value,
  • component register offset, size and dimension and
  • design configurable element values.
  • Added support for referencing parameter and model parameter values in expressions.
  • Added autocomplete feature for available parameter names in expressions.
  • Added feature to view all elements referencing a parameter or model parameter.
  • Configurable element values editor now automatically shows the configurable elements in component instance, their current and default value.
  • Added feature to show/hide elements of a component in component editor.
  • Added support for component choices.
  • Enabled different signal widths for master and slave modes in abstraction definition.
  • Improved ribbon toolbar.

New in Kactus2 2.6.0 (Nov 1, 2014)

  • New plugin interface for file import.
  • New plugins:
  • Verilog import.
  • Verilog generator for components and designs.
  • Makefile generator.
  • Added feature to run import from component editor.
  • Added editing of views to component wizard.
  • Added feature to sort port list by port number.
  • Moved VHDL import tool to import plugin.
  • Updated MCAPI to version 2.015.
  • Updated MCAPI generator.

New in Kactus2 2.5.0 (Jul 8, 2014)

  • All vendor extensions are conserved in IP-XACT documents.
  • Added feature to insert notes in designs.
  • Added feature to run files e.g. script files from Filesets.
  • Added feature to define default run executable for file types.
  • Improved lock operation: Enables browsing of tabs while the document is locked.
  • Added design column for memories.
  • Improved opening of hierarchical components in design.
  • Added feature to reorder bus interfaces in component editor.
  • Fixed library crashing with Abstractor objects.
  • Fixed other minor bugs and usability issues.

New in Kactus2 2.4.17 (Feb 7, 2014)

  • Added PadsPartGenerator and QuartusPinImport plugins.

New in Kactus2 2.4.0 (Jan 30, 2014)

  • Improved Editor for port maps:
  • Improved visualization of port maps.
  • Added bit-by-bit port map creation.
  • Added Bus interface generation wizard:
  • New Bus and Abstraction definition generation based on ports in a component.
  • Bus interface and port map generation to component using the generatarted or existing Bus and Abstraction definitions.
  • Added help page for keyboard and mouse shortcuts.
  • Fixed numerous non-critical bugs and usability issues.
  • Migrated to Qt 5.2.0.
  • Separated plugin system from Kactus2 core.

New in Kactus2 2.3.0 (Sep 23, 2013)

  • Added copy-paste to all designs allowing copying of component instances, interfaces and whole columns excluding connections.
  • Added multi-selection capability for copy-paste and deletion to all designs.
  • Added VLNV drag & drop support to summary tables in the component editor.
  • Added the possibility to rearrange the default positions of component's interfaces in the general page of the component editor.
  • Added a tooltip to show memory map size in AUB for each address block and segment in the memory map and address space editors.
  • Added a check box to enable/disable local memory map.
  • Added Browse button to New dialog pages in order to have more convenient directory selection if the automatically suggested location does not suffice.
  • Added 'Select All' to the right-click context menu in design editors.
  • Added library filter selections to be saved as a part of the workspace. - Fixed numerous bugs, both critical and non-critical ones.
  • Fixed a bug causing the port maps dialog to open when using the off-page connection tool.
  • Fixed API/COM interface deletion to also delete the underlying interface metadata from the SW component.
  • Fixed an issue of ad-hoc ports not disappearing when a bus interface containing the corresponding ports is deleted.
  • Removed the 'Parameterizable' firmness attribute option.
  • Migrated to Qt 5.1.1.
  • Improved routing of connections in all designs with automatic overlap avoidance.
  • Improved memory map visualization with the following changes:
  • Memory block widths are now scaled acccording to the window size.
  • Changes to colors, fonts and alignment to improve readability.
  • Visualization of overlapping addresses and violations.
  • Improved address spaces visualization.
  • SW designs are now shown in the library and they can be mapped to the CPU's SW view by dragging from the library.
  • Bus interface port maps editor now shows also the port directions.
  • Component editor now highlights the used sections in the tree view.
  • Name conflicts are now checked in all tables in the component editor. This concerns also copy-paste to the tables.
  • Changed the sorting in port and generic editors to case-insensitive.
  • Renamed 'Add Signals to Bus' to 'New Abstraction Definition' to prevent confusion with the Add signals option in the bus editor.
  • Changed the order of HW views in the component editor to list hierarchical views before non-hierarchical ones. Hierarchical views now also show an icon.

New in Kactus2 2.2.0 (Jul 5, 2013)

  • NEW: Component creation wizard, including a VHDL import tool.
  • NEW: Dependency analysis tool with enhanced file set editing features.
  • NEW: Generator plugins.
  • Memory map header generator.
  • Altera BSP generator.
  • NEW: Source analyzer plugins for dependency analysis.
  • VHDL source analyzer.
  • C/C++ source analyzer.
  • Added printing of library summary report to the output window after the library scan.
  • Added COM interface implementation reference to be able to specify an implementing driver for each COM interface in the components.
  • Added editing features for HW view reference and file set references to the system view editor in the component editor.
  • Added file set references, build commands, BSP build tools and environment variables to software views in the component editor.
  • Added half-automatic port creation for draft interfaces.
  • Added copy-paste for bus interfaces in the HW design editor.
  • Added UUIDs to be used to identify component instances in the designs (especially in system designs).
  • Added the ability to launch shell scripts for components.
  • Fixed performance issues with large libraries causing unnecessary slowdowns in the library window and the component editor.
  • Removed the possibility to create new components/objects from scratch in the library window.
  • Bus editor now shows width field as empty instead of an invalid -1 when the optional width value is not specified in the abstraction definition.
  • Unnecessary errors about URL file paths are no longer shown.
  • Fixed the missing yellow color in the mandatory file type field in the file set editor.
  • Fixed the bus interface editor showing master interface settings by default even though the interface mode is undefined.
  • Fixed the issue of an ad-hoc port not being hidden in a design after the ad-hoc visibility has been unchecked in the component editor and saved.
  • Fixed a crash when trying to auto-assign addresses in the address editor when the selected component instance has no bus interfaces that would be shown in the editor.
  • Migrated to Qt 5.1.0.
  • Changed the naming of library context menu New items.
  • Replaced the old list editor with a better collection editor.
  • Disabled the instantiation of template components to designs.
  • Updated context-sensitive help content.
  • Fixed the issue of the component editor tree view not being updated when making changes through the actual editor pages.
  • Added more detailed information to be generated at the beginning of the generated files.
  • Generated VHDL is now formatted to max 80 character lines.
  • Enhanced editing of ports in the component editor.

New in Kactus2 2.1 Build 194 (Feb 12, 2013)

  • Menu ribbon remade completely with better scaling behavior. This also fixes the blackout bug present in the previous version.
  • Added the possibility to select which library locations are currently active.
  • Fixed missing prints from the library integrity check.
  • Fixed the problem of context help not working due to a missing Qt DLL.
  • Removed any dependencies to GCF framework.
  • Migrated to Qt 5.0.1.

New in Kactus2 2.1 Build 1 (Feb 6, 2013)

  • Designs can be opened through component editor by double clicking a hierarchical view.
  • Added info column to memory maps editor displaying which bus interfaces the memory map in binded to.
  • Support for local memory map within address spaces added.
  • Added visualization of memory maps to component editor.
  • Added visualization of adress space to component editor.
  • Added XML header editor to component editor for user to create custom headers to XML IP-XACT files.
  • Fixed bug when drag & dropping abstraction definition to bus interface within component editor.
  • Fixed bug when exporting SW in system design.
  • Fixed bugs in CSV import and export.
  • Fixed VLNV editor content assist bugs.
  • Migrated to Qt 5.0
  • Changed colors of API and COM connections within system designs.

New in Kactus2 2.0 Build 1 (Sep 14, 2012)

  • Added address editor for setting memory addresses in HW designs.
  • Added context-sensitive help system (help pages are still work-in-progress).
  • Added support for memory maps and registers to the component editor.
  • Added Show Errors feature to the library in order to enumerate errors of a
  • specific library item in a dialog.
  • Added naming policies to the settings dialog.
  • Fixed the crash after library refresh.
  • The hierarchical library view now shows also the designs.
  • Changed icons in the library view.
  • Kactus2 settings are now saved to an INI file in the user's AppData folder.
  • VLNV tree does not sort library items according to the item type anymore.

New in Kactus2 2.0 RC (Jul 13, 2012)

  • NEW: Fully revised system design architecture.
  • NEW: Experimental C++ plugin API for creating component generators.
  • Added design editing feature that allows component replacement using drag'n'drop both from the library and within a design.
  • Added rubberband connections to new system designs.
  • Added auto-suggestion of possible generic names.
  • Added refresh button to the ribbon.
  • Added two new document types (extensions): COM definition and API definition.
  • Added CSV import for generics.
  • Added contact information to Kactus2-generated XML files.
  • Removed internal IP-XACT objects that are no longer needed with the new system designs.
  • Connection bullets now indicate also the direction of the connection. Broken/invalid connections and missing interfaces are now visualized in red in designs.
  • Component instances referencing IP-XACT components that are not found in the library are now kept in the design and visualized in red.
  • Drafted designs can now be saved without packetizing the draft components. Added more information to tool tip texts shown in the library and design editors. KNOWN UNRESOLVED ISSUES:
  • Kactus2 may crash when the library is refreshed after Plain IP-XACT library view has been used.

New in Kactus2 1.3 Build 27 (Mar 28, 2012)

  • Added shortcuts: Ctrl+Tab for switching tabs, Ctrl+W for closing tabs, F5 for refreshing the documents and Ctrl+Space for switching protection mode.
  • Fixed a critical crash in system designs and components having CPU elements.

New in Kactus2 1.3 (Mar 23, 2012)

  • NEW CORE FEATURE:
  • Added support for ad-hoc connections and setting ad-hoc visibility for each port separately.
  • Added better validity checking for IP-Xact objects.
  • Added usage instructions to lists that are editable by double clicking.
  • Added address space editor and CPU editing features to the component editor.
  • Fixed an incorrect connection of Qt signals in HW designs.
  • Fixed a scroll bar issue in New dialog when using larger fonts in Windows. Fixed the scaling issue of the component editor's left pane.
  • Fixed a crash when saving a design with a packetized draft component. Fixed a regression bug of workspaces working incorrectly with Qt 4.8.0. Removed the unnecessary dependencies to Qt ActiveX modules.
  • Migrated to Qt 4.8.0.
  • The library locations are now scanned automatically on program start or when the library locations are changed.
  • Enhanced the error messages coming from the Quartus generator.
  • Enhanced the error messages when saving an incomplete component.
  • Error messages from the library check are now indented.
  • Library check now prints more detailed error summary.
  • Also the MCAPI channel connection function calls are now automatically generated to sender side application code.
  • A flat view is now automatically added to drafted components when they are packetized.
  • Changed the component instance numbering to start from zero instead of one.
  • Abstraction definition is not compulsory anymore in the component editor, but is auto-filled when using bus and abstraction definitions created with Kactus2.