HDL Sort Utility

HDL Sort Utility was developed as an Open Source and accessible RTL/VHDL/Verilog sorting utility. HDL Sort Utility is inuitive enough to dump out compile script with proper VHDL library mapping. This software is intended for those designers that do not know the order of their RTL files and do not know which file to compile in which library.

This utility will take the file containing all the Verilog and/or VHDL files(one file per line without any * or regular expresion ). It internally process all those and finally create modelsim compilation script. The script can be used to create compilation script for any simullator.