What's new in Config2 4.50
Aug 16, 2019
- Code generation updated to reference new example code base: compiler_defs.h has been deprecated, si_toolchain.h is now used.
New in Config2 4.40 (Dec 14, 2013)
- Support added for Si1060/1/2/3/4/5
- Support added for Si1080/1/2/3/4/5
New in Config2 4.30 (Dec 7, 2013)
- Support added for C8051F388/9/A/B/C
New in Config2 4.21 (Aug 1, 2013)
- Corrections:
- Updated the C8051F85x & F86x device selection list to include the /IM, /IU, and /IS package distinctions.
New in Config2 4.11 (Mar 5, 2013)
- CWC8051F37x_39x.dll:
- Port IO labels for P2.2, P2.3 labels corrected to EESCL, EESDA.
- SMBus configuration includes SMBTC configuration for pinswap selection when EEPROM is being used.
- CWC8051F12x.dll:
- When PCA Module capture updates to a value less than 255 the high byte is also written. (The low byte is written first to clear the ECOM bit, and the high byte write sets the ECOM bit.)
- The timer 3 calculation for overflow now includes the option to use an external clock frequency.
- CWC8051F13x.dll:
- When PCA Module capture updates to a value less than 255 the high byte is also written. (The low byte is written first to clear the ECOM bit, and the high byte write sets the ECOM bit.)
- The timer 3 calculation for overflow now includes the option to use an external clock frequency.
- CWC8051F0xx.dll:
- When PCA Module capture updates to a value less than 255 the high byte is also written. (The low byte is written first to clear the ECOM bit, and the high byte write sets the ECOM bit.)
- CWC8051F02x.dll:
- When PCA Module capture updates to a value less than 255 the high byte is also written. (The low byte is written first to clear the ECOM bit, and the high byte write sets the ECOM bit.)
- CWC8051F04x.dll:
- When PCA Module capture updates to a value less than 255 the high byte is also written. (The low byte is written first to clear the ECOM bit, and the high byte write sets the ECOM bit.)
- CWC8051F06x.dll:
- When PCA Module capture updates to a value less than 255 the high byte is also written. (The low byte is written first to clear the ECOM bit, and the high byte write sets the ECOM bit.)
- CWC8051F9xx.dll (F90x,91x,92x,93x,96x,98x,99x):
- Updated Comparator MUX inputs to display correct pin options.
- Updated Port Drive Strength to display correct pin options.
- Updated CS0 Module to display correct pin options.
- Before enabling the internal oscillator, the OSCBIAS bit in the voltage regulator is enabled.
- Enabling the internal oscillator now uses an |= operation instead of an = operation. In addition, the default value for OSCICN is 0x00 on all 9xx devices except for the 93x-92x devices which are 0x0F.
- The comments generated for the SPI1 peripheral on a 96x now reflect the correct page.
- The SPI_Init() function on 96x devices now sets the correct page for the SPI0 and SPI1 registers.
- The Interrupt INT0/INT1 Configuration for 96x devices now contains the correct port pin selections.
- Note: Existing projects with SPI_Init functions are not compatible with this new release.
- CWC8051F50x_51x.dll:
- The interrupts IT01CF configuration code now includes setting the SFRPAGE to the CONFIG_PAGE.
- CWC8051F54x.dll:
- The interrupts IT01CF configuration code now includes setting the SFRPAGE to the CONFIG_PAGE.
- CWC8051F55x_561x_57x.dll:
- The interrupts IT01CF configuration code now includes setting the SFRPAGE to the CONFIG_PAGE.
- CWC8051F8x_59x.dll:
- The interrupts IT01CF configuration code now includes setting the SFRPAGE to the CONFIG_PAGE.
New in Config2 4.10 (Aug 30, 2012)
- Corrections:
- All project files have been updated to refer to the current include file conventions.
- An error in the calculation of the SMBus clock rate on C8051F12x\13x devices has been corrected.
- New features/Enhancements:
- Added support for C8051T626/7 & T670/1 devices.
- Added support for C8051F370/1/4/5 devices.
- Added support for C8051F390/1/2/3/4/5/6/7/8/9 devices.